Description
Specifications:-
- Part number CD4072B
- Technology Family CD4000
- VCC (Min) (V) 3
- VCC (Max) (V) 18
- Channels (#) 2
- Inputs per channel 4
- Input type Standard CMOS
- Output type Push-Pull
- Features Standard Speed (tpd > 50ns)
- IOL (Max) (mA) 6.8
- IOH (Max) (mA) -6.8
- Data rate (Max) (Mbps) 8
- Rating See Data Sheet
- Operating temperature range (C) -55 to 125
CD4072 OR gates provide the system designer with direct implementation of the positive-logic OR function and supplement the existing family of CMOS gates.
The CD4072 types are supplied in 14-lead hermetic dual-in-line ceramic packages (F3A suffix), 14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline packages (M, MT, M96, and NSR suffixes) and 14-lead thin shrink small-outline packages (PW and PWR suffixes).
Features:-
- Medium-Speed Operation – tPLH, tPHL = 60 ns (typ.) at VDD = 10 V
- 100% tested for quiescent current at 20 V
- Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
- Standardized, symmetrical output characteristics
- Noise margin (full package-temperature range):
1 V at VDD = 5 V
2 V at VDD = 10 V
2.5 V at VDD = 15 V - 5-V, 10-V, and 15-V parametric ratings
- Meets all requirements of JEDEC Tentative Standard No. 13B, “Standard Specifications for Description of ’B’ Series CMOS Devices”
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